1. Field of the Invention
The present invention relates generally to a semiconductor process, and more specifically to a semiconductor process which changes the contents of a surface of a recess.
2. Description of the Prior Art
For decades, chip manufacturers have been making metal-oxide-semiconductor (MOS) transistors faster by making them smaller. As semiconductor processes advance to very deep sub micron era such as 65-nm node or beyond, how to increase the driving current for MOS transistors has become a critical issue. In order to improve device performance, crystal strain technology has been developed. Crystal strain technology is becoming more and more attractive as a means for getting better performance in the field of MOS transistor fabrication. Putting a strain on a semiconductor crystal alters the speed at which charges move through that crystal. Strain makes MOS transistors work better by enabling electrical charges, such as electrons, to pass more easily through the silicon lattice of the gate channel. Attempts have been made to use a strained silicon layer, which has been grown epitaxially on a silicon substrate with a silicon germanium (SiGe) epitaxial structure or a silicon carbide (SiC) epitaxial structure disposed in between. In this type of MOS transistor, a biaxial compressive or tensile strain occurs in the epitaxy silicon layer due to the silicon germanium or silicon carbide which has a larger or smaller lattice constant than silicon; as a result, the band structure alters, and the carrier mobility increases. This enhances the speed performance of the MOS transistors.
As well as the type of epitaxial structure affecting the stresses induced in a gate channel of a MOS transistor, the shape of the epitaxial structure will affect the stresses also. Specifically, the shape of the epitaxial structure can control stresses induced in specific parts of the gate channel, to achieve or improve the electrical performances of the MOS transistor. However, the shapes of the epitaxial structures will change during later performed processes according to the processing situations such as processing temperatures, which will lead to the shapes of the epitaxial structures being different from predetermined shapes formed by etching. The quality of the formed MOS transistor is therefore hard to be controlled precisely.